1. Field of the Invention
The present invention generally relates to an SOI (Silicon On Insulator) substrate and a manufacturing method thereof, and in particular, to an SOI substrate comprising a silicon substrate including in part an SOI structure in plan view, or an SOI substrate comprising a silicon substrate including in part a buried insulating film formed therein, and also to a manufacturing method thereof. Said SOI structure includes a SIMOX (Separation by IMplanted OXygen) structure.
2. Description of the Related Art
Aiming for a reduction in a manufacturing cost of a device as well as an improvement of a working speed, the SoC (System on Chip) technology has been suggested for providing a mixed packaging of a logic circuit and a memory circuit on one chip. Preferably, this logic circuit may be fabricated on the SOI substrate in order to reduce electric power consumption and improve the working speed. Further, preferably the memory circuit may be fabricated on a bulk crystal from a viewpoint of a crystal integrity. In this connection, a partial SOI (patterned SOI) structure has been invented, which allows for a bulk region to be left in a part of the SOI substrate.
Conventionally, as an exemplary manufacturing method of the SIMOX substrate having the partial SOI structure, there has been known, for example, a technique described in the Japanese Patent Laid-open Publication 5-82525.
Said technique defines such a manufacturing method in which, first of all, a surface of a silicon single crystal substrate is partially masked with a silicon oxide film or the like. After that, similarly to the fabrication of a regular SIMOX substrate, oxygen ions are implanted into a surface of the above silicon single crystal substrate, which is then subject to a thermal processing at a high temperature. By way of this, the SIMOX substrate can be fabricated, which has a partial SOI structure with a buried silicon oxide film formed between an active layer and a bulk layer in a part of said silicon single crystal substrate, or a region thereof having no masking applied. This manufacturing method is especially advantageous in improving of an activity aiming for a high quality of the SIMOX substrate having a thin film of active layer.
In such a manufacturing method of the SIMOX substrate as stated above according to the prior art, however, the buried silicon oxide film is expanded in its volume during the high temperature thermal processing, leading to a strain/stress to be induced in an interface between the buried silicon oxide film and the bulk layer. There has been a fear, in association with this, that a dislocation could be propagated across a region defined by a distance of some μm from this interface (IBM, Hannon, et al., 2000 Symposium on VLSI Tech. Digest).
There is another fear remaining that if the pattern of the partial SOI structure became highly micro-fabricated in future, the dislocation of the pattern could affect inversely to yield of the device.